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authorSubrata Banik <subrata.banik@intel.com>2021-01-29 19:17:24 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-01-30 14:38:38 +0000
commit0b53d8b883684a68b1e218f6c6ddb2a9d302558c (patch)
tree30dc37f437f4bb7612f1bff3f881752e3e29597d /src/soc/intel/alderlake
parent1d18c8e3c8a45cc84a41f54fc0dd88712191bc68 (diff)
soc/intel/alderlake: Remove pch.h from SoC directory
Remove unnecessary include of soc/pch.h from - bootblock/pch.c - bootblock/report_platform.c - bootblock/uart.c Define PCIE_CLK_XXX macro inside chip.h for mb/devicetree.cb to consume. Change-Id: Ic08ef586d4590462434ba2c64e21dd802ccc6800 Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50132 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
-rw-r--r--src/soc/intel/alderlake/bootblock/pch.c1
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c1
-rw-r--r--src/soc/intel/alderlake/chip.h5
-rw-r--r--src/soc/intel/alderlake/include/soc/pch.h10
-rw-r--r--src/soc/intel/alderlake/uart.c1
5 files changed, 4 insertions, 14 deletions
diff --git a/src/soc/intel/alderlake/bootblock/pch.c b/src/soc/intel/alderlake/bootblock/pch.c
index 662f33e1b7..3a92661f08 100644
--- a/src/soc/intel/alderlake/bootblock/pch.c
+++ b/src/soc/intel/alderlake/bootblock/pch.c
@@ -21,7 +21,6 @@
#include <soc/espi.h>
#include <soc/iomap.h>
#include <soc/p2sb.h>
-#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
#include <soc/pm.h>
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 8cc81c13a0..002b306e0c 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -16,7 +16,6 @@
#include <device/pci_ids.h>
#include <intelblocks/mp_init.h>
#include <soc/bootblock.h>
-#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <string.h>
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index f23b9d2566..70ceba7fdf 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -9,7 +9,6 @@
#include <intelblocks/gspi.h>
#include <intelblocks/pcie_rp.h>
#include <soc/gpe.h>
-#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/pmc.h>
#include <soc/serialio.h>
@@ -20,6 +19,10 @@
#define MAX_HD_AUDIO_SNDW_LINKS 4
#define MAX_HD_AUDIO_SSP_LINKS 6
+#define PCIE_CLK_NOTUSED 0xFF
+#define PCIE_CLK_LAN 0x70
+#define PCIE_CLK_FREE 0x80
+
struct soc_intel_alderlake_config {
/* Common struct containing soc config data required by common code */
diff --git a/src/soc/intel/alderlake/include/soc/pch.h b/src/soc/intel/alderlake/include/soc/pch.h
deleted file mode 100644
index 89e8a8a1f7..0000000000
--- a/src/soc/intel/alderlake/include/soc/pch.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef _SOC_ALDERLAKE_PCH_H_
-#define _SOC_ALDERLAKE_PCH_H_
-
-#define PCIE_CLK_NOTUSED 0xFF
-#define PCIE_CLK_LAN 0x70
-#define PCIE_CLK_FREE 0x80
-
-#endif
diff --git a/src/soc/intel/alderlake/uart.c b/src/soc/intel/alderlake/uart.c
index 6e64e0faff..06618b294b 100644
--- a/src/soc/intel/alderlake/uart.c
+++ b/src/soc/intel/alderlake/uart.c
@@ -13,7 +13,6 @@
#include <intelblocks/pcr.h>
#include <intelblocks/uart.h>
#include <soc/iomap.h>
-#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>