diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-11-23 14:46:16 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-11-24 06:24:52 +0000 |
| commit | 98b696703e8e508dd57b467a557f9bc7567f7e6d (patch) | |
| tree | 600f656e6f71ad7a65a8acdf75750ec4f660c90f /src/soc/intel/alderlake/include | |
| parent | fb43107e62ffba04f2d9aafad05c794d904471aa (diff) | |
soc/intel/meteorlake: Decouple HECI disabling interface from its Kconfig
This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC
IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG
recommends to disable the CSE PCI device while CSE is in
software temporary disable state.
BUG=b:260183610
TEST=Able to build google/rex.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3c9c5a73028cde90af3553093a13d0c05b831bae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69930
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/include')
0 files changed, 0 insertions, 0 deletions