diff options
author | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-02-23 10:13:23 +0000 |
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committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-02-23 10:54:59 +0000 |
commit | 5d4cee75e521b50bd40a1f8cb37be4138e04e67c (patch) | |
tree | ebcee8a625ed81f6beffe9a0324c713d6a20b9a6 /src/soc/intel/alderlake/include | |
parent | 272c9c07bd9c7dcd684614c67487504ce06f7a36 (diff) |
Revert "soc/intel/adl: Select CSE defined ME spec version for alderlake"
This reverts commit 272c9c07bd9c7dcd684614c67487504ce06f7a36.
Reason for revert: Sorry was going to give +2 but pressed the submit
button and accidentally merged this out of train.
Change-Id: I8a2c6407832bdcf3d475209356501f8fc3672f6b
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73213
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/soc/intel/alderlake/include')
-rw-r--r-- | src/soc/intel/alderlake/include/soc/me.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/me.h b/src/soc/intel/alderlake/include/soc/me.h new file mode 100644 index 0000000000..f029991fc3 --- /dev/null +++ b/src/soc/intel/alderlake/include/soc/me.h @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ALDERLAKE_ME_H_ +#define _ALDERLAKE_ME_H_ + +/* ME Host Firmware Status register 1 */ +union me_hfsts1 { + uint32_t data; + struct { + uint32_t working_state : 4; + uint32_t mfg_mode : 1; + uint32_t fpt_bad : 1; + uint32_t operation_state : 3; + uint32_t fw_init_complete : 1; + uint32_t ft_bup_ld_flr : 1; + uint32_t update_in_progress : 1; + uint32_t error_code : 4; + uint32_t operation_mode : 4; + uint32_t reserved_0 : 4; + uint32_t boot_options_present : 1; + uint32_t invoke_enhance_dbg_mode: 1; + uint32_t reserved_1 : 5; + uint32_t d0i3_support_valid : 1; + } __packed fields; +}; + +/* Host Firmware Status Register 2 */ +union me_hfsts2 { + uint32_t data; + struct { + uint32_t reserved_0 : 4; + uint32_t cpu_replaced : 1; + uint32_t reserved_1 : 3; + uint32_t cpu_replaced_valid : 1; + uint32_t low_power_state : 1; + uint32_t reserved_2 : 22; + } __packed fields; +}; + +/* ME Host Firmware Status Register 3 */ +union me_hfsts3 { + uint32_t data; + struct { + uint32_t reserved_0 : 4; + uint32_t fw_sku : 3; + uint32_t reserved_1 : 25; + } __packed fields; +}; + + +/* Host Firmware Status Register 4 */ +union me_hfsts4 { + uint32_t data; + struct { + uint32_t rsvd0; + } __packed fields; +}; + +/* Host Firmware Status Register 5 */ +union me_hfsts5 { + uint32_t data; + struct { + uint32_t rsvd0; + } __packed fields; +}; + +/* Host Firmware Status Register 6 */ +union me_hfsts6 { + u32 data; + struct { + uint32_t reserved_0 : 1; + uint32_t cpu_debug_disable : 1; + uint32_t reserved_1 : 19; + uint32_t manuf_lock : 1; + uint32_t reserved_2 : 8; + uint32_t fpf_soc_lock : 1; + uint32_t txt_support : 1; + } __packed fields; +}; + +#endif /* _ALDERLAKE_ME_H_ */ |