diff options
author | Michał Kopeć <michal.kopec@3mdeb.com> | 2022-04-07 14:14:31 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-22 17:35:43 +0000 |
commit | febaf2f4131257bc79582784af9ef89b38a37236 (patch) | |
tree | e82ddb89f9e64e0d4196861450bf0d81f7e77c50 /src/soc/intel/alderlake/fsp_params.c | |
parent | 619bb074945bd5acabd0588dcb1371b8c94108d2 (diff) |
soc/intel/alderlake: add GPIO definitions for PCH-S
Add GPIO definitions for ADL-S, similarly to how TGL/TGL-H handles
the split.
Based on:
- Intel PCH-S EDS Vol2 (#621483)
- Alderlake-S FSP
- slimbootloader sources
- Linux alderlake-pinctrl driver
Change-Id: I0fd1dc645c19c33bf14424703f966271e884ed3d
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/alderlake/fsp_params.c')
-rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 05f3997287..007fa9669e 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -18,7 +18,7 @@ #include <intelpch/lockdown.h> #include <intelblocks/tcss.h> #include <soc/cpu.h> -#include <soc/gpio_soc_defs.h> +#include <soc/gpio.h> #include <soc/intel/common/vbt.h> #include <soc/pci_devs.h> #include <soc/pcie.h> |