diff options
| author | zhixingma <zhixing.ma@intel.com> | 2022-06-13 15:06:27 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-28 21:01:27 +0000 |
| commit | 529a64b788888aa21189104309a5e9e814bcb0e0 (patch) | |
| tree | 4d296c1b555fed9bc70dd9f884c79e14c7aa31ce /src/soc/intel/alderlake/cpu.c | |
| parent | dd582b0cb10932fae8198c928172af49deeab34e (diff) | |
soc/intel: Add Raptor Lake device IDs
Add Raptor Lake specific CPU, System Agent, PCH, IGD device IDs.
References:
RaptorLake External Design Specification Volume 1 (640555)
600/700 Series PCH External Design Specification Volume 1 (626817)
BUG=b:229134437
BRANCH=firmware-brya-14505.B
TEST=Booted to OS on adlrvp + rpl silicon
Signed-off-by: Zhixing Ma <zhixing.ma@intel.com>
Change-Id: I8e8b9ec6ae82de7d7aa2302097fc66f47b782323
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65117
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/cpu.c')
| -rw-r--r-- | src/soc/intel/alderlake/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index a6175ed796..c2564ac4fa 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -243,6 +243,7 @@ enum adl_cpu_type get_adl_cpu_type(void) const uint16_t rpl_p_mch_ids[] = { PCI_DID_INTEL_RPL_P_ID_1, PCI_DID_INTEL_RPL_P_ID_2, + PCI_DID_INTEL_RPL_P_ID_3, }; const uint16_t mchid = pci_s_read_config16(PCI_DEV(0, PCI_SLOT(SA_DEVFN_ROOT), |