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| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2021-08-31 21:19:56 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-05 19:28:35 +0000 |
| commit | 92db5d734c7c20c70c3a87b23cd48ccb8acbaf1a (patch) | |
| tree | ec54d17c3c2ec890da1f4a8fded302f4dc3d0ac4 /src/soc/intel/alderlake/chipset.cb | |
| parent | a91d93111470475d3b9deafefc49f0cf23ab48de (diff) | |
soc/intel/alderlake: Add tpch device information under dptf
Add tpch device information for thermal functionality under dptf
for alderlake soc based platform.
BUG=b:198582766
BRANCH=None
TEST=Build FW and test on brya0 board
Change-Id: Iad8e8bc0b7a104bbe582bc477936d0d00087f1d1
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/alderlake/chipset.cb')
0 files changed, 0 insertions, 0 deletions