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| author | Himanshu Sahdev <himanshu.sahdev@intel.com> | 2022-09-06 17:27:47 +0530 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-09-08 14:16:15 +0000 |
| commit | 6e007516abdb9c4f1d57afdf81d7049393aedbad (patch) | |
| tree | 547497620bfc064d3d9b596e075f3e5736741122 /src/soc/intel/alderlake/chip.h | |
| parent | b6a0b26e88561d20959337d91c6aad1c860951d5 (diff) | |
guybrush: remove RO_GSCVD area from FMAP
This area relates to storing of AP RO verification information.
CONFIG_VBOOT_GSCVD is enabled by default for TPM_GOOGLE_TI50 and
guybrush is using TPM_GOOGLE_CR50.
Signed-off-by: Himanshu Sahdev <himanshu.sahdev@intel.com>
Change-Id: I896b871bf2ac64e334514b979add9b8ac2c43945
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Harsha B R <harsha.b.r@intel.com>
Diffstat (limited to 'src/soc/intel/alderlake/chip.h')
0 files changed, 0 insertions, 0 deletions