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authorLean Sheng Tan <sheng.tan@9elements.com>2022-04-01 12:03:51 +0200
committerAngel Pons <th3fanbus@gmail.com>2022-04-04 17:48:56 +0000
commit9e78dd13577b577f96699710fefd965acda686e1 (patch)
tree9e6f2bb50eda7d698ba9ca14e5971537885d197e /src/soc/intel/alderlake/bootblock
parent74d6efc924326b5858fabbafa58ce095d4cca38d (diff)
soc/intel/alderlake: Update CPU IDs with correct steppings
Update ADL CPU IDs per correct steppings listed in Intel Doc 626774. Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Change-Id: I722043c493b8c3de8965bcaa13f33c907d51f284 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63299 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/alderlake/bootblock')
-rw-r--r--src/soc/intel/alderlake/bootblock/pmc_descriptor.c2
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c8
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/alderlake/bootblock/pmc_descriptor.c b/src/soc/intel/alderlake/bootblock/pmc_descriptor.c
index c585f70c37..14a9dcb90e 100644
--- a/src/soc/intel/alderlake/bootblock/pmc_descriptor.c
+++ b/src/soc/intel/alderlake/bootblock/pmc_descriptor.c
@@ -45,7 +45,7 @@ void configure_pmc_descriptor(void)
uint8_t si_desc_buf[CONFIG_SI_DESC_REGION_SZ];
struct region_device desc_rdev;
- if (cpu_get_cpuid() != CPUID_ALDERLAKE_A0)
+ if (cpu_get_cpuid() != CPUID_ALDERLAKE_J0)
return;
if (fmap_locate_area_as_rdev_rw(CONFIG_SI_DESC_REGION, &desc_rdev) < 0) {
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 3342e4b732..721355c06a 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -23,10 +23,10 @@ static struct {
u32 cpuid;
const char *name;
} cpu_table[] = {
- { CPUID_ALDERLAKE_A0, "Alderlake Platform" },
- { CPUID_ALDERLAKE_A1, "Alderlake Platform" },
- { CPUID_ALDERLAKE_A2, "Alderlake Platform" },
- { CPUID_ALDERLAKE_A3, "Alderlake Platform" },
+ { CPUID_ALDERLAKE_J0, "Alderlake J0 Platform" },
+ { CPUID_ALDERLAKE_K0, "Alderlake K0 Platform" },
+ { CPUID_ALDERLAKE_Q0, "Alderlake Q0 Platform" },
+ { CPUID_ALDERLAKE_R0, "Alderlake R0 Platform" },
{ CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" },
};