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authorDinesh Gehlot <digehlot@google.com>2023-02-24 05:09:04 +0000
committerLean Sheng Tan <sheng.tan@9elements.com>2023-02-24 12:08:33 +0000
commit930fded5b7f50333179c71e0d1fcf1857862dfe0 (patch)
treef109fdce1255d939d70a4f095bd4f5a61fbf04c7 /src/soc/intel/alderlake/Kconfig
parent9a5b743e56432ff13cecc814f1127f382779432d (diff)
soc/intel/adl: Select CSE defined ME spec version for alderlake
Alderlake based SoCs uses Intel's Management Engine (ME), version 16. This patch selects ME 16 specification defined at common code and removes alderlake SoC specific ME code and data structures. BUG=b:260309647 Test=Build verified for brya. Signed-off-by: Dinesh Gehlot <digehlot@google.com> Change-Id: Ib94e4662c735b1c31c8dfca1cfa881e6fa4070fa Reviewed-on: https://review.coreboot.org/c/coreboot/+/73244 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/alderlake/Kconfig')
-rw-r--r--src/soc/intel/alderlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index afa2a752df..27176ec9c9 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -105,6 +105,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
select SOC_INTEL_COMMON_BLOCK_IPU if !SOC_INTEL_ALDERLAKE_PCH_S
select SOC_INTEL_COMMON_BLOCK_IRQ
+ select SOC_INTEL_COMMON_BLOCK_ME_SPEC_16
select SOC_INTEL_COMMON_BLOCK_MEMINIT
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_COMMON_BLOCK_PMC_EPOC