diff options
author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2020-12-21 16:57:49 +0800 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-12-29 17:25:27 +0000 |
commit | 4ea47c32b01d1604ec2b4d0b40b433454e62c520 (patch) | |
tree | dca773b9eff205c27c489ca31e98b3f5016837df /src/soc/intel/alderlake/Kconfig | |
parent | bd0fa62b6be176395dc119099236709e52a6203e (diff) |
soc/intel/alderlake: Update chipset.cb for TCSS and USB
Follow TGL chipset.cb to add alias for TCSS and USB ports.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I803dad0af09b26a55ffb767826ba79cf61de04ca
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48793
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/Kconfig')
-rw-r--r-- | src/soc/intel/alderlake/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index a77acc3e1f..c73df5019d 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -14,6 +14,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_PM_TIMER_EMULATION + select DRIVERS_USB_ACPI select FSP_COMPRESS_FSP_S_LZ4 select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW select FSP_M_XIP @@ -52,6 +53,9 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_BLOCK_USB4 + select SOC_INTEL_COMMON_BLOCK_USB4_PCIE + select SOC_INTEL_COMMON_BLOCK_USB4_XHCI select SOC_INTEL_COMMON_FSP_RESET select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_RESET |