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authorWerner Zeh <werner.zeh@siemens.com>2016-02-19 10:50:38 +0100
committerWerner Zeh <werner.zeh@siemens.com>2016-02-25 15:16:44 +0100
commit1c3b1112fa2dbdd66b0470224715dc6da254ce62 (patch)
tree3bdfc5078d9a098195ce604ccace6fa56af5a5f5 /src/soc/imgtec/pistachio/ddr2_init.c
parent01554574492a4965668e0d9423d3ae4da079cfde (diff)
fsp_baytrail: Fix a possible hanging DisplayPort
On some devices it can happen that DisplayPort TX lanes do not work properly if the power gate setup is omitted. If that happens, DisplayPort training will fail and therefore DisplayPort channel will not work. Both ports are affected. It seems that not every CPU shows this effect and those that are affected tend to fail more often in a cold environment. With this fix a board that originally shows this failure was running for over 1000 power cycles without issues. Change-Id: Ia266674490a1bee63a85b38d1dc949dcdf683cbc Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/13743 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/imgtec/pistachio/ddr2_init.c')
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