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authorShuo Liu <shuo.liu@intel.com>2024-06-25 19:04:11 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-06-28 11:27:27 +0000
commitbcd247376633b0fb4f1dbfbf8c2e02d2c926adec (patch)
treed23179c3e099d34f76ff64ea08af8308061bf34b /src/soc/example/min86/cache_as_ram.S
parent57027571187c17ec8617ddaffc2148d878f5c06f (diff)
acpi: Add support for DRHD size reporting
VT-d spec 4.0 supports size definition for DRHD BAR to support DRHD sizes larger than 4KB. If the value in the field is N, the size of the register set is 2^N 4 KB pages. Some latest OS (e.g. Linux kernel 6.5) will have VTd driver trying to use the beyond 4KB part of the DRHD BAR if they exist. They need the DRHD size field to set up page mapping before access those registers. Re-add acpi_create_dmar_drhd with a size parameter to support the needs. TEST=Build and boot on intel/archercity CRB Change-Id: I49dd5de2eca257a5f6240e36d05755cabca96d1c Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Gang Chen <gang.c.chen@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82429 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/example/min86/cache_as_ram.S')
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