diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:43:59 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-22 17:14:49 +0000 |
| commit | cb795f0ff96f59a1a667f83143d855c463eff5ca (patch) | |
| tree | 0c690b73a7604d954f7d4d6675807e5725c61084 /src/soc/cavium | |
| parent | ed098694b0c427547ee7ac064f55495012fb684a (diff) | |
soc/cavium: Drop unneeded empty lines
Change-Id: I01227e3c5b650f56e81c5c8e724e3768f06f4530
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44597
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium')
| -rw-r--r-- | src/soc/cavium/cn81xx/clock.c | 1 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/include/soc/gpio.h | 2 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/timer.c | 1 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/uart.c | 1 | ||||
| -rw-r--r-- | src/soc/cavium/common/bootblock.c | 2 | ||||
| -rw-r--r-- | src/soc/cavium/common/include/soc/bootblock.h | 1 |
6 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/cavium/cn81xx/clock.c b/src/soc/cavium/cn81xx/clock.c index 0a6be32366..e415a854ab 100644 --- a/src/soc/cavium/cn81xx/clock.c +++ b/src/soc/cavium/cn81xx/clock.c @@ -39,7 +39,6 @@ u64 thunderx_get_ref_clock(void) return PLL_REF_CLK; } - /** * Returns the I/O clock speed in Hz */ diff --git a/src/soc/cavium/cn81xx/include/soc/gpio.h b/src/soc/cavium/cn81xx/include/soc/gpio.h index 61e00d9cab..5735a80b06 100644 --- a/src/soc/cavium/cn81xx/include/soc/gpio.h +++ b/src/soc/cavium/cn81xx/include/soc/gpio.h @@ -9,8 +9,6 @@ typedef u32 gpio_t; #include <gpio.h> /* The following functions must be implemented by SoC/board code. */ - - gpio_t gpio_pin_count(void); void gpio_invert(gpio_t gpio, int value); int gpio_strap_value(gpio_t gpio); diff --git a/src/soc/cavium/cn81xx/timer.c b/src/soc/cavium/cn81xx/timer.c index 6ac85ef3b1..d9879baec6 100644 --- a/src/soc/cavium/cn81xx/timer.c +++ b/src/soc/cavium/cn81xx/timer.c @@ -51,7 +51,6 @@ check_member(cn81xx_timer, ctl_cntacr0, 0x20040); check_member(cn81xx_timer, cwd_wdog[0], 0x40000); check_member(cn81xx_timer, cwd_poke[0], 0x50000); - #define GTI_CC_CNTCR_EN (1 << 0) #define GTI_CC_CNTCR_HDBG (1 << 1) #define GTI_CC_CNTCR_FCREQ (1 << 8) diff --git a/src/soc/cavium/cn81xx/uart.c b/src/soc/cavium/cn81xx/uart.c index 4e5fd82a37..2f8537cbcd 100644 --- a/src/soc/cavium/cn81xx/uart.c +++ b/src/soc/cavium/cn81xx/uart.c @@ -47,7 +47,6 @@ struct cn81xx_uart { #define UART_FBRD_BAUD_DIVFRAC_SHIFT 0 #define UART_FBRD_BAUD_DIVFRAC_MASK 0x3f - check_member(cn81xx_uart, uctl_ctl, 0x1000); check_member(cn81xx_uart, uctl_spare1, 0x10f8); diff --git a/src/soc/cavium/common/bootblock.c b/src/soc/cavium/common/bootblock.c index 2fca0abbac..d9cf2e5a08 100644 --- a/src/soc/cavium/common/bootblock.c +++ b/src/soc/cavium/common/bootblock.c @@ -13,12 +13,10 @@ __attribute__((weak)) void bootblock_soc_early_init(void) { /* do nothing */ } __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ } __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ } - /* C code entry point for the boot block */ void bootblock_main(const uint64_t reg_x0, const uint64_t reg_pc) { - init_timer(); /* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */ diff --git a/src/soc/cavium/common/include/soc/bootblock.h b/src/soc/cavium/common/include/soc/bootblock.h index 203d804711..172a5edd8c 100644 --- a/src/soc/cavium/common/include/soc/bootblock.h +++ b/src/soc/cavium/common/include/soc/bootblock.h @@ -12,5 +12,4 @@ void bootblock_mainboard_init(void); void bootblock_main(const uint64_t reg_x0, const uint64_t reg_pc); - #endif /* SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_BOOTBLOCK_H_ */ |