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authorMichał Żygowski <michal.zygowski@3mdeb.com>2021-04-29 18:12:11 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2021-05-13 17:18:42 +0000
commitb8d35c1056de5031b291554b17121a99591cac8a (patch)
tree5ae708931455647f866b54d82c1e451aa2d0bfc0 /src/soc/cavium
parentf23a85219947544c49039cd1d92d0df8f511d96a (diff)
cpu/amd/pi/00730F01/model_16_init.c: create correct MTRR solution
Create the correct MTRR solution based on the physical address space provided by RESOURCE_ALLOCATOR_V4. Previously CPU initialization did not account for lost C6 DRAM storage MTRR during postcar frame creation. The BSP on 2GB has been stripped from UC MTRR covering C6 DRAM and overlapping with usable DRAM WB MTRR. However this UC MTRR remained on APs which caused inconsistent MTRRs warning in Linux. Use generic MTRR function to create correct MTRR solution that propagates to APs. This also fixes the inconsistent MTRRs warning. TEST=boot Debian with Linux 4.14 on apu2 4GB ECC and apu3 2GB no-ECC Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ie2d7a75affd7d3d3a1bc6327fb423e206b28562f Reviewed-on: https://review.coreboot.org/c/coreboot/+/52762 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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