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authorAngel Pons <th3fanbus@gmail.com>2021-04-19 17:12:42 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-06-14 09:59:25 +0000
commit07baa7a7f06369d9dc795c5a9b34314e88d14dd8 (patch)
tree7e226de800d75fc2fbe32af3144720c743b0e5f8 /src/soc/cavium
parente42ce6bb499031cbe4cdbad19314d2c9971b2186 (diff)
soc/intel/broadwell: Re-do SerialIO UART console support
Use the same code from Lynx Point on Broadwell, and adjust as needed. Also add a config file to ensure the code gets build-tested. Tested on out-of-tree Compal LA-A992P (Haswell ULT), UART 0 works. Change-Id: I527024098738700d5fbaf3e27cf4db331a0322bd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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