diff options
| author | John Zhao <john.zhao@intel.com> | 2020-05-13 09:53:24 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-18 07:07:03 +0000 |
| commit | 9e9f301b5878d269b7d6b6490279586fe533040a (patch) | |
| tree | 4f3761ccef322666cb61c83c205a773843414951 /src/soc/cavium/cn81xx/spi.c | |
| parent | 81a30ec3a72bf948ac17bc145bd9f7cda3884ad4 (diff) | |
soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method
CPU to PCH method refers to PCH ACPI operation region which was wrongly
defined as SystemIO. This causes ACPI AE_LIMIT error from PM _DSW
method. Change the operation region from SystemIO to SystemMemory to
resolve this execution failure.
BUG=b:140290596
TEST=Built and booted to kernel. _DSW method executes successfully without
ACPI AE_LIMIT error.
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I3965c3d891f7d3cf4a448edc0c3f7e7749a905a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/cavium/cn81xx/spi.c')
0 files changed, 0 insertions, 0 deletions