diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-04-17 13:47:55 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-07-19 13:57:24 +0000 |
| commit | d0c6797e796af155cd435ed344958dbb9c418a86 (patch) | |
| tree | 57bc66cdea7783d3d6025d7df458fc790f4bece6 /src/soc/cavium/cn81xx/include | |
| parent | 02c08147645d37e8d21f89b62cb7029be7543bd6 (diff) | |
soc/cavium: Add PCI support
* Add support for secure/unsecure split
* Use MMCONF to access devices in domain0
* Program MSIX vectors to fix a crash in GNU/Linux
Tested on Cavium CN81XX_EVB.
All PCI devices are visible.
Change-Id: I881f38a26a165e6bd965fcd73547473b5e32d4b0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25750
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium/cn81xx/include')
| -rw-r--r-- | src/soc/cavium/cn81xx/include/soc/addressmap.h | 6 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/include/soc/ecam0.h | 21 |
2 files changed, 27 insertions, 0 deletions
diff --git a/src/soc/cavium/cn81xx/include/soc/addressmap.h b/src/soc/cavium/cn81xx/include/soc/addressmap.h index 938dd3233d..392c93f1c1 100644 --- a/src/soc/cavium/cn81xx/include/soc/addressmap.h +++ b/src/soc/cavium/cn81xx/include/soc/addressmap.h @@ -52,6 +52,10 @@ /* PCC */ #define ECAM_PF_BAR2 0x848000000000ULL +#define ECAM0_DEVX_NSDIS 0x87e048070000ULL +#define ECAM0_DEVX_SDIS 0x87e048060000ULL +#define ECAM0_RSLX_NSDIS 0x87e048050000ULL +#define ECAM0_RSLX_SDIS 0x87e048040000ULL /* CPT */ /* SLI */ @@ -102,6 +106,8 @@ ((((x) == 0) || ((x) == 1) || ((x) == 2) || ((x) == 3)) ? \ (0x87E028000000ULL + ((x) << 24)) : 0) +#define CAVM_GICD_SETSPI_NSR 0x801000000040ULL +#define CAVM_GICD_CLRSPI_NSR 0x801000000048ULL /* TWSI */ #define MIO_TWS0_PF_BAR0 (0x87E0D0000000ULL + (0 << 24)) diff --git a/src/soc/cavium/cn81xx/include/soc/ecam0.h b/src/soc/cavium/cn81xx/include/soc/ecam0.h new file mode 100644 index 0000000000..1cc249d92d --- /dev/null +++ b/src/soc/cavium/cn81xx/include/soc/ecam0.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __COREBOOT_SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_ECAM0_H +#define __COREBOOT_SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_ECAM0_H + +extern struct device_operations pci_domain_ops_ecam0; + +#endif |