aboutsummaryrefslogtreecommitdiff
path: root/src/soc/cavium/cn81xx/Makefile.inc
diff options
context:
space:
mode:
authorPatrick Rudolph <patrick.rudolph@9elements.com>2018-04-17 13:47:55 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-07-19 13:57:24 +0000
commitd0c6797e796af155cd435ed344958dbb9c418a86 (patch)
tree57bc66cdea7783d3d6025d7df458fc790f4bece6 /src/soc/cavium/cn81xx/Makefile.inc
parent02c08147645d37e8d21f89b62cb7029be7543bd6 (diff)
soc/cavium: Add PCI support
* Add support for secure/unsecure split * Use MMCONF to access devices in domain0 * Program MSIX vectors to fix a crash in GNU/Linux Tested on Cavium CN81XX_EVB. All PCI devices are visible. Change-Id: I881f38a26a165e6bd965fcd73547473b5e32d4b0 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/25750 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium/cn81xx/Makefile.inc')
-rw-r--r--src/soc/cavium/cn81xx/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc
index 16aa4ff2ab..b2de484ac8 100644
--- a/src/soc/cavium/cn81xx/Makefile.inc
+++ b/src/soc/cavium/cn81xx/Makefile.inc
@@ -63,6 +63,7 @@ ramstage-y += sdram.c
ramstage-y += soc.c
ramstage-y += cpu.c
ramstage-y += cpu_secondary.S
+ramstage-y += ecam0.c
# BDK coreboot interface
ramstage-y += ../common/bdk-coreboot.c