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authorDaisuke Nojiri <dnojiri@chromium.org>2015-02-06 12:46:38 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-17 10:19:42 +0200
commit128de62e8c433b7f9158d53364439d06fa648765 (patch)
treeb9ef470195efc9c8f7a6f68098b78adc7a21b78a /src/soc/broadcom/cygnus/include
parentfcfd989774eaffa891666df617e3e424660769d1 (diff)
cygnus: configure memlayout
we also pick no RETURN_FROM_VERSTAGE. BUG=none BRANCH=broadcom-firmware TEST=booted b0 board Change-Id: Iddd95f233a614187ae6b26f351a289c23f25742f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 243598925333982b40297adad878c461990d7d70 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I6ab96628cecb84e061777cc85d6d572823f6d63c Original-Reviewed-on: https://chromium-review.googlesource.com/251303 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9767 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Diffstat (limited to 'src/soc/broadcom/cygnus/include')
-rw-r--r--src/soc/broadcom/cygnus/include/soc/memlayout.ld24
1 files changed, 14 insertions, 10 deletions
diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
index 41d13fd7c5..c48c1bc221 100644
--- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld
+++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
@@ -28,14 +28,18 @@ SECTIONS
RAMSTAGE(0x00200000, 128K)
POSTRAM_CBFS_CACHE(0x01000000, 1M)
- SRAM_START(0x61000000)
- TTB(0x61000000, 16K)
- BOOTBLOCK(0x61004000, 16K)
- PRERAM_CBMEM_CONSOLE(0x61008000, 4K)
- VBOOT2_WORK(0x61009000, 12K)
- OVERLAP_VERSTAGE_ROMSTAGE(0x6100C000, 40K)
- PRERAM_CBFS_CACHE(0x61016000, 1K)
- CBFS_HEADER_OFFSET(0x61016800)
- STACK(0x61017800, 4K)
- SRAM_END(0x610040000)
+ SRAM_START(0x02000000)
+ REGION(reserved_for_system_status, 0x02000000, 4K, 4)
+ TTB(0x02004000, 16K) /* must be aligned to 16K */
+ REGION(reserved_for_maskrom, 0x02009400, 4K, 4)
+ BOOTBLOCK(0x0200A440, 18K)
+ PRERAM_CBMEM_CONSOLE(0x0200F000, 4K)
+ VBOOT2_WORK(0x02010000, 16K)
+ VERSTAGE(0x02014000, 48K)
+ ROMSTAGE(0x02020000, 48K)
+ PRERAM_CBFS_CACHE(0x0202C000, 1K)
+ CBFS_HEADER_OFFSET(0x0202C800)
+ STACK(0x0202D000, 12K)
+ REGION(reserved_for_secure_service_api, 0x0203F000, 4K, 4)
+ SRAM_END(0x02040000)
}