diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-10-18 19:48:41 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-20 16:41:53 +0000 |
| commit | f1a03b1d6d9c02f4c1db1cc6c11e772ce0c6ca56 (patch) | |
| tree | 1246bc0a85878dafa71f9c3cd4fab13c64b29764 /src/soc/amd | |
| parent | c6e4cc8873791b1c112ef8bd392a1aab1e940246 (diff) | |
soc/amd/stoneyridge: initialize GPIOs for serial console
Initialize the two GPIOs of the SoC UART if it's used for serial console
to be sure that the I/O mux is configured correctly without having to
rely on the bootblock_mainboard_early_init call to do this. This brings
Stoneyridge more in line with the other AMD SoCs. Since this code will
be factored out to the common AMD SoC code in a follow-up patch, the
function prototype is added to southbridge.h instead of creating a new
uart.h header file.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id4aa6734e63dad204d22ce962b983cde6e3abd62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/early_fch.c | 3 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/uart.c | 9 |
3 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/early_fch.c b/src/soc/amd/stoneyridge/early_fch.c index b46bde787f..763e3f2901 100644 --- a/src/soc/amd/stoneyridge/early_fch.c +++ b/src/soc/amd/stoneyridge/early_fch.c @@ -127,6 +127,9 @@ void bootblock_fch_early_init(void) fch_enable_legacy_io(); enable_aoac_devices(); + if (CONFIG(AMD_SOC_CONSOLE_UART)) + set_uart_config(CONFIG_UART_FOR_CONSOLE); + /* disable the keyboard reset function before mainboard GPIO setup */ if (CONFIG(DISABLE_KEYBOARD_RESET_PIN)) fch_disable_kb_rst(); diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index e00bf8ef3e..32c102c50f 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -184,6 +184,8 @@ void fch_final(void *chip_info); void enable_aoac_devices(void); void fch_clk_output_48Mhz(u32 osc); +void set_uart_config(unsigned int idx); + /* * Call the mainboard to get the USB Over Current Map. The mainboard * returns the map and 0 on Success or -1 on error or no map. There is diff --git a/src/soc/amd/stoneyridge/uart.c b/src/soc/amd/stoneyridge/uart.c index 969146dc07..3b6d49caea 100644 --- a/src/soc/amd/stoneyridge/uart.c +++ b/src/soc/amd/stoneyridge/uart.c @@ -6,6 +6,7 @@ #include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> +#include <soc/southbridge.h> #include <types.h> static const struct soc_uart_ctrlr_info uart_info[] = { @@ -26,3 +27,11 @@ uintptr_t get_uart_base(unsigned int idx) return uart_info[idx].base; } + +void set_uart_config(unsigned int idx) +{ + if (idx >= ARRAY_SIZE(uart_info)) + return; + + gpio_configure_pads(uart_info[idx].mux, 2); +} |