diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-24 11:44:50 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-25 18:46:16 +0000 |
| commit | d560ad6e7a372c4e3d1c14d158ca9318c5b1ba90 (patch) | |
| tree | a3875b662a05ef10e9b97b728c700db6654d7ef5 /src/soc/amd | |
| parent | 2f5cb2e3556db4b5fc7e372488e194646893e4fa (diff) | |
soc/amd/*/data_fabric: use DF_ prefix for bit and shift defines
Adding the DP_ prefix to the defines for MMIO_NP, MMIO_WE and MMIO_RE
clarifies the scope of those definitions. For consistency also add this
prefix to MMIO_DST_FABRIC_ID_SHIFT.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3a509ccc071aa51a67552fb9e7195358a76fe4dc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59627
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/cezanne/data_fabric.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/data_fabric.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/data_fabric/data_fabric_helper.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/data_fabric.h | 6 | ||||
| -rw-r--r-- | src/soc/amd/picasso/data_fabric.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/data_fabric.h | 2 |
6 files changed, 13 insertions, 13 deletions
diff --git a/src/soc/amd/cezanne/data_fabric.c b/src/soc/amd/cezanne/data_fabric.c index 1a0f9cb320..2a13d2053f 100644 --- a/src/soc/amd/cezanne/data_fabric.c +++ b/src/soc/amd/cezanne/data_fabric.c @@ -44,7 +44,7 @@ void data_fabric_set_mmio_np(void) for (i = 0; i < NUM_NB_MMIO_REGS; i++) { /* Adjust all registers that overlap */ ctrl = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); - if (!(ctrl & (MMIO_WE | MMIO_RE))) + if (!(ctrl & (DF_MMIO_WE | DF_MMIO_RE))) continue; /* not enabled */ base = data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)); @@ -92,8 +92,8 @@ void data_fabric_set_mmio_np(void) data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), np_bot); data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(reg), np_top); data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), - (IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT) | MMIO_NP | MMIO_WE - | MMIO_RE); + (IOMS0_FABRIC_ID << DF_MMIO_DST_FABRIC_ID_SHIFT) | DF_MMIO_NP + | DF_MMIO_WE | DF_MMIO_RE); data_fabric_print_mmio_conf(); } diff --git a/src/soc/amd/cezanne/include/soc/data_fabric.h b/src/soc/amd/cezanne/include/soc/data_fabric.h index 13a96e0488..27444befb3 100644 --- a/src/soc/amd/cezanne/include/soc/data_fabric.h +++ b/src/soc/amd/cezanne/include/soc/data_fabric.h @@ -6,7 +6,7 @@ #include <types.h> /* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define MMIO_NP BIT(16) +#define DF_MMIO_NP BIT(16) #define IOMS0_FABRIC_ID 10 diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index abb4ba8c3a..0fcee3642b 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -63,7 +63,7 @@ void data_fabric_print_mmio_conf(void) void data_fabric_disable_mmio_reg(unsigned int reg) { data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), - IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT); + IOMS0_FABRIC_ID << DF_MMIO_DST_FABRIC_ID_SHIFT); data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), 0); data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(reg), 0); } @@ -71,7 +71,7 @@ void data_fabric_disable_mmio_reg(unsigned int reg) static bool is_mmio_reg_disabled(unsigned int reg) { uint32_t val = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(reg)); - return !(val & (MMIO_WE | MMIO_RE)); + return !(val & (DF_MMIO_WE | DF_MMIO_RE)); } int data_fabric_find_unused_mmio_reg(void) diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index ede507564a..604c24e16f 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -16,9 +16,9 @@ #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0x208 /* The MMIO_NP bit is SoC-specific */ -#define MMIO_DST_FABRIC_ID_SHIFT 4 -#define MMIO_WE BIT(1) -#define MMIO_RE BIT(0) +#define DF_MMIO_DST_FABRIC_ID_SHIFT 4 +#define DF_MMIO_WE BIT(1) +#define DF_MMIO_RE BIT(0) /* The number of data fabric MMIO registers is SoC-specific */ #define NB_MMIO_BASE(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_BASE0) diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c index b5949f028c..aec8a9e626 100644 --- a/src/soc/amd/picasso/data_fabric.c +++ b/src/soc/amd/picasso/data_fabric.c @@ -44,7 +44,7 @@ void data_fabric_set_mmio_np(void) for (i = 0; i < NUM_NB_MMIO_REGS; i++) { /* Adjust all registers that overlap */ ctrl = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); - if (!(ctrl & (MMIO_WE | MMIO_RE))) + if (!(ctrl & (DF_MMIO_WE | DF_MMIO_RE))) continue; /* not enabled */ base = data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)); @@ -92,8 +92,8 @@ void data_fabric_set_mmio_np(void) data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), np_bot); data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(reg), np_top); data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), - (IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT) | MMIO_NP | MMIO_WE - | MMIO_RE); + (IOMS0_FABRIC_ID << DF_MMIO_DST_FABRIC_ID_SHIFT) | DF_MMIO_NP + | DF_MMIO_WE | DF_MMIO_RE); data_fabric_print_mmio_conf(); } diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h index d652d1957c..5533433126 100644 --- a/src/soc/amd/picasso/include/soc/data_fabric.h +++ b/src/soc/amd/picasso/include/soc/data_fabric.h @@ -8,7 +8,7 @@ /* D18F0 - Fabric Configuration registers */ /* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define MMIO_NP BIT(12) +#define DF_MMIO_NP BIT(12) #define IOMS0_FABRIC_ID 9 |