diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-02-07 14:31:16 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-08 13:41:25 +0000 |
| commit | 965a45f4861016c4b348c597f5418ef8f14c0192 (patch) | |
| tree | e8d6aea2ee4abcb9fbcaae2b4d158e509254f9a1 /src/soc/amd | |
| parent | 5bdedae900628858d6e06f546c7e0d5a67baf6df (diff) | |
soc/amd/common/data_fabric: print decoded control register contents
Since all SoCs define the df_mmio_control union for the bits used in the
code, data_fabric_print_mmio_conf can take advantage of that and also
print a decoded version of those bits.
Output on Mandolin before the patch:
=== Data Fabric MMIO configuration registers ===
idx control base limit
0 93 fc000000 febfffff
1 93 10000000000 ffffffffffff
2 93 d0000000 f7ffffff
3 1093 fed00000 fedfffff
4 90 0 ffff
5 90 0 ffff
6 90 0 ffff
7 90 0 ffff
Output on Mandolin with the patch:
=== Data Fabric MMIO configuration registers ===
idx base limit control R W NP F-ID
0 fc000000 febfffff 93 x x 9
1 10000000000 ffffffffffff 93 x x 9
2 d0000000 f7ffffff 93 x x 9
3 fed00000 fedfffff 1093 x x x 9
4 0 ffff 90 9
5 0 ffff 90 9
6 0 ffff 90 9
7 0 ffff 90 9
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I06e1d3a3e9abd664f59f2bb852394e7f723f2b30
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/common/block/data_fabric/data_fabric_helper.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index fe983aca7c..fb4b26c049 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -47,13 +47,13 @@ void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, ui void data_fabric_print_mmio_conf(void) { - uint32_t control; + union df_mmio_control control; uint64_t base, limit; printk(BIOS_SPEW, "=== Data Fabric MMIO configuration registers ===\n" - "idx control base limit\n"); + "idx base limit control R W NP F-ID\n"); for (unsigned int i = 0; i < DF_MMIO_REG_SET_COUNT; i++) { - control = data_fabric_broadcast_read32(0, DF_MMIO_CONTROL(i)); + control.raw = data_fabric_broadcast_read32(0, DF_MMIO_CONTROL(i)); /* Base and limit address registers don't contain the lower address bits, but are shifted by D18F0_MMIO_SHIFT bits */ base = (uint64_t)data_fabric_broadcast_read32(0, DF_MMIO_BASE(i)) @@ -62,8 +62,12 @@ void data_fabric_print_mmio_conf(void) << D18F0_MMIO_SHIFT; /* Lower D18F0_MMIO_SHIFT address limit bits are all 1 */ limit += (1 << D18F0_MMIO_SHIFT) - 1; - printk(BIOS_SPEW, " %2u %8x %16llx %16llx\n", - i, control, base, limit); + printk(BIOS_SPEW, " %2u %16llx %16llx %8x %s %s %s %4x\n", + i, base, limit, control.raw, + control.re ? "x" : " ", + control.we ? "x" : " ", + control.np ? "x" : " ", + control.fabric_id); } } |