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authorRaul E Rangel <rrangel@chromium.org>2021-05-04 15:38:03 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-09 18:09:36 +0000
commit7b84b02492ec3ae1209c369f9149dd12e69d158a (patch)
treee5128d483d308a8ccc61d175c6acd8fc627563f5 /src/soc/amd
parent129d473b2dc994bbfef8a74d5a9471bcc0c56a00 (diff)
soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table
These are helper methods for interacting with the AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID. BUG=b:184766519, b:184766197 TEST=Build guybrush Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Id03d0b74ca12e7bcee11f8d13b0e802861c13923 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52911 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/fsp/pci/Kconfig5
-rw-r--r--src/soc/amd/common/fsp/pci/Makefile.inc5
-rw-r--r--src/soc/amd/common/fsp/pci/pci_routing_info.c41
3 files changed, 51 insertions, 0 deletions
diff --git a/src/soc/amd/common/fsp/pci/Kconfig b/src/soc/amd/common/fsp/pci/Kconfig
new file mode 100644
index 0000000000..9d6596cc89
--- /dev/null
+++ b/src/soc/amd/common/fsp/pci/Kconfig
@@ -0,0 +1,5 @@
+config SOC_AMD_COMMON_FSP_PCI
+ bool
+ select SOC_AMD_COMMON_BLOCK_PCI
+ help
+ This option enabled FSP to provide common PCI functions.
diff --git a/src/soc/amd/common/fsp/pci/Makefile.inc b/src/soc/amd/common/fsp/pci/Makefile.inc
new file mode 100644
index 0000000000..cc1377a42c
--- /dev/null
+++ b/src/soc/amd/common/fsp/pci/Makefile.inc
@@ -0,0 +1,5 @@
+ifeq ($(CONFIG_SOC_AMD_COMMON_FSP_PCI),y)
+
+ramstage-y += pci_routing_info.c
+
+endif # CONFIG_SOC_AMD_COMMON_FSP_PCI
diff --git a/src/soc/amd/common/fsp/pci/pci_routing_info.c b/src/soc/amd/common/fsp/pci/pci_routing_info.c
new file mode 100644
index 0000000000..21423da210
--- /dev/null
+++ b/src/soc/amd/common/fsp/pci/pci_routing_info.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/amd_pci_util.h>
+#include <console/console.h>
+#include <device/pci_def.h>
+#include <fsp/util.h>
+#include <FspGuids.h>
+#include <types.h>
+
+const struct pci_routing_info *get_pci_routing_table(size_t *entries)
+{
+ static const struct pci_routing_info *routing_table;
+ static size_t routing_table_entries;
+
+ size_t hob_size = 0;
+
+ if (routing_table) {
+ *entries = routing_table_entries;
+ return routing_table;
+ }
+
+ routing_table = fsp_find_extension_hob_by_guid(AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID.b,
+ &hob_size);
+
+ if (routing_table == NULL || hob_size == 0) {
+ printk(BIOS_ERR, "Couldn't find PCIe routing HOB.\n");
+ return NULL;
+ }
+
+ routing_table_entries = hob_size / sizeof(struct pci_routing_info);
+
+ for (size_t i = 0; i < routing_table_entries; ++i) {
+ printk(BIOS_DEBUG, "%02x.%x: group: %u, swizzle: %u, irq: %u\n",
+ PCI_SLOT(routing_table[i].devfn), PCI_FUNC(routing_table[i].devfn),
+ routing_table[i].group, routing_table[i].swizzle, routing_table[i].irq);
+ }
+
+ *entries = routing_table_entries;
+
+ return routing_table;
+}