diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-13 18:31:40 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-14 17:35:17 +0000 |
| commit | 71b918d882738fd99f7894d43a96d5782ad1928b (patch) | |
| tree | cb5b0c3ab1961b4c041b0cd68a2a657d74b9f81c /src/soc/amd | |
| parent | 4f51c94099b5a8308c0342830e1bf52f1ac095e9 (diff) | |
include/cpu/amd/msr: add and use MC_CTL_MASK macro
Add this macro to be able to conveniently access the MC_CTL_MASK
register for each MCA bank. Also drop the unused definitions for
MC1_CTL_MASK and MC4_CTL_MASK.
Change-Id: I23ce1eac2ffce35a2b45387ee86aa77b52da5494
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56261
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/mca.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c index 598bfb5d53..d9aac913e9 100644 --- a/src/soc/amd/stoneyridge/mca.c +++ b/src/soc/amd/stoneyridge/mca.c @@ -123,8 +123,7 @@ static void build_bert_mca_error(struct mca_bank_status *mci) ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MC_CTL(mci->bank), 4); if (!ctx) goto failed; - ctx = cper_new_ia32x64_context_msr(status, x86_sec, - MC0_CTL_MASK + mci->bank, 1); + ctx = cper_new_ia32x64_context_msr(status, x86_sec, MC_CTL_MASK(mci->bank), 1); if (!ctx) goto failed; @@ -160,7 +159,7 @@ static void mca_print_error(unsigned int bank) printk(BIOS_WARNING, " MC%u_MISC = %08x_%08x\n", bank, msr.hi, msr.lo); msr = rdmsr(IA32_MC_CTL(bank)); printk(BIOS_WARNING, " MC%u_CTL = %08x_%08x\n", bank, msr.hi, msr.lo); - msr = rdmsr(MC0_CTL_MASK + bank); + msr = rdmsr(MC_CTL_MASK(bank)); printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo); } |