diff options
author | Chris Wang <chris.wang@amd.corp-partner.google.com> | 2023-02-20 10:27:50 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-04 02:28:45 +0000 |
commit | 50aa3d99215b558f959fceed891ed04db648739e (patch) | |
tree | c904632687ea8be392c2ee059789e5561902916f /src/soc/amd | |
parent | 12bfe6bc95494f2a993c4222812d8960a66282ba (diff) |
soc/amd/mendocino: Remove the SPL DPTC parameter
The SPL parameter for DPTC settings is not available for STT-enabled
platforms. It needs to be removed to avoid confusing STT calculations.
BUG=b:265267957
BRANCH=none
TEST=Run the WebGL aquarium with 5000 fish and verify that
there are no power drop peaks.
Change-Id: I8e6dad7d24883f8aadce83ebac401ecd4137d61a
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Van Patten <timvp@google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/mendocino/chip.h | 6 | ||||
-rw-r--r-- | src/soc/amd/mendocino/root_complex.c | 18 |
2 files changed, 3 insertions, 21 deletions
diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h index 858bcbe07c..dc147f8b2e 100644 --- a/src/soc/amd/mendocino/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -73,13 +73,11 @@ struct soc_amd_mendocino_config { uint32_t vrm_soc_current_limit_throttle_mA; /* tablet mode.*/ - uint32_t sustained_power_limit_mW_tablet; /* Thermal profile B*/ uint32_t fast_ppt_limit_mW_B; uint32_t slow_ppt_limit_mW_B; uint32_t slow_ppt_time_constant_s_B; - uint32_t sustained_power_limit_mW_B; uint16_t stt_min_limit_B; uint16_t stt_m1_B; uint16_t stt_m2_B; @@ -90,7 +88,6 @@ struct soc_amd_mendocino_config { uint32_t fast_ppt_limit_mW_C; uint32_t slow_ppt_limit_mW_C; uint32_t slow_ppt_time_constant_s_C; - uint32_t sustained_power_limit_mW_C; uint16_t stt_min_limit_C; uint16_t stt_m1_C; uint16_t stt_m2_C; @@ -101,7 +98,6 @@ struct soc_amd_mendocino_config { uint32_t fast_ppt_limit_mW_D; uint32_t slow_ppt_limit_mW_D; uint32_t slow_ppt_time_constant_s_D; - uint32_t sustained_power_limit_mW_D; uint16_t stt_min_limit_D; uint16_t stt_m1_D; uint16_t stt_m2_D; @@ -112,7 +108,6 @@ struct soc_amd_mendocino_config { uint32_t fast_ppt_limit_mW_E; uint32_t slow_ppt_limit_mW_E; uint32_t slow_ppt_time_constant_s_E; - uint32_t sustained_power_limit_mW_E; uint16_t stt_min_limit_E; uint16_t stt_m1_E; uint16_t stt_m2_E; @@ -124,7 +119,6 @@ struct soc_amd_mendocino_config { uint32_t fast_ppt_limit_mW_F; uint32_t slow_ppt_limit_mW_F; uint32_t slow_ppt_time_constant_s_F; - uint32_t sustained_power_limit_mW_F; uint16_t stt_min_limit_F; uint16_t stt_m1_F; uint16_t stt_m2_F; diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c index 69f470b522..dce9498aa1 100644 --- a/src/soc/amd/mendocino/root_complex.c +++ b/src/soc/amd/mendocino/root_complex.c @@ -17,7 +17,7 @@ #include <stdint.h> #include "chip.h" -#define DPTC_TOTAL_UPDATE_PARAMS 14 +#define DPTC_TOTAL_UPDATE_PARAMS 13 struct dptc_input { uint16_t size; @@ -25,8 +25,8 @@ struct dptc_input { } __packed; -#define DPTC_INPUTS(_thermctllmit, _sustained, _spptTimeConst, _fast, _slow, \ - _vrmCurrentLimit, _vrmMaxCurrentLimit, _vrmSocCurrentLimit, \ +#define DPTC_INPUTS(_thermctllmit, _spptTimeConst, _fast, _slow, \ + _vrmCurrentLimit, _vrmMaxCurrentLimit, _vrmSocCurrentLimit, \ _sttMinLimit, _sttM1, _sttM2, _sttCApu, _sttAlphaApu, _sttSkinTempLimitApu) \ { \ .size = sizeof(struct dptc_input), \ @@ -36,10 +36,6 @@ struct dptc_input { .value = _thermctllmit, \ }, \ { \ - .id = ALIB_DPTC_SUSTAINED_POWER_LIMIT_ID, \ - .value = _sustained, \ - }, \ - { \ .id = ALIB_DPTC_SLOW_PPT_TIME_CONSTANT_ID, \ .value = _spptTimeConst, \ }, \ @@ -226,7 +222,6 @@ static void acipgen_dptci(void) /* Normal mode DPTC values. */ struct dptc_input default_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW, config->slow_ppt_time_constant_s, config->fast_ppt_limit_mW, config->slow_ppt_limit_mW, @@ -244,7 +239,6 @@ static void acipgen_dptci(void) /* Low/No Battery */ struct dptc_input no_battery_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW, config->slow_ppt_time_constant_s, config->fast_ppt_limit_mW, config->slow_ppt_limit_mW, @@ -263,7 +257,6 @@ static void acipgen_dptci(void) #if (CONFIG(FEATURE_TABLET_MODE_DPTC)) struct dptc_input tablet_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW_tablet, config->slow_ppt_time_constant_s, config->fast_ppt_limit_mW, config->slow_ppt_limit_mW, @@ -283,7 +276,6 @@ static void acipgen_dptci(void) /* Profile B */ struct dptc_input thermal_B_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW_B, config->slow_ppt_time_constant_s_B, config->fast_ppt_limit_mW_B, config->slow_ppt_limit_mW_B, @@ -302,7 +294,6 @@ static void acipgen_dptci(void) /* Profile C */ struct dptc_input thermal_C_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW_C, config->slow_ppt_time_constant_s_C, config->fast_ppt_limit_mW_C, config->slow_ppt_limit_mW_C, @@ -321,7 +312,6 @@ static void acipgen_dptci(void) /* Profile D */ struct dptc_input thermal_D_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW_D, config->slow_ppt_time_constant_s_D, config->fast_ppt_limit_mW_D, config->slow_ppt_limit_mW_D, @@ -340,7 +330,6 @@ static void acipgen_dptci(void) /* Profile E */ struct dptc_input thermal_E_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW_E, config->slow_ppt_time_constant_s_E, config->fast_ppt_limit_mW_E, config->slow_ppt_limit_mW_E, @@ -359,7 +348,6 @@ static void acipgen_dptci(void) /* Profile F */ struct dptc_input thermal_F_input = DPTC_INPUTS( config->thermctl_limit_degreeC, - config->sustained_power_limit_mW_F, config->slow_ppt_time_constant_s_F, config->fast_ppt_limit_mW_F, config->slow_ppt_limit_mW_F, |