diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-06-15 16:25:46 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-16 16:38:15 +0000 |
commit | 3b46333b39701ac2fdbbeba8d863449904f12f7a (patch) | |
tree | 9e1f123b63099a79fd8458567effee969080ad3d /src/soc/amd | |
parent | 038ed9eb7dd544707e599222db6dfeac1ba7e08e (diff) |
soc/amd/picasso/acpi/sb_fch: use AOAC offset defines
Replace the magic numbers with the existing defines.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2d98ea8c5bb0e487c7eef0b0a1cdada9cb04df4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/picasso/acpi/sb_fch.asl | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index 926bf10c39..e561d1d5d3 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <soc/amd/common/acpi/aoac.asl> +#include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> #include <amdblocks/acpimmio_map.h> @@ -122,7 +123,7 @@ Device (FUR0) } } - AOAC_DEVICE(11, 0) + AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0) } Device (FUR1) { @@ -153,7 +154,7 @@ Device (FUR1) { } } - AOAC_DEVICE(12, 0) + AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0) } Device (FUR2) { @@ -184,7 +185,7 @@ Device (FUR2) { } } - AOAC_DEVICE(16, 0) + AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0) } Device (FUR3) { @@ -215,7 +216,7 @@ Device (FUR3) { } } - AOAC_DEVICE(26, 0) + AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0) } Device (I2C2) { @@ -251,7 +252,7 @@ Device (I2C2) { Return (0x0F) } - AOAC_DEVICE(7, 0) + AOAC_DEVICE(FCH_AOAC_DEV_I2C2, 0) } Device (I2C3) @@ -287,7 +288,7 @@ Device (I2C3) Return (0x0F) } - AOAC_DEVICE(8, 0) + AOAC_DEVICE(FCH_AOAC_DEV_I2C3, 0) } Device (MISC) |