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authorFelix Held <felix-coreboot@felixheld.de>2021-11-02 17:15:58 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-11-03 18:37:28 +0000
commit28a0a14b5b4262cc0278ba348cccede9627d7408 (patch)
tree370c932475b45b6d06d9e54916bb81b4e27b4c1b /src/soc/amd
parentc435038c55e4a5db68df8e070e756d5a76a5b3ef (diff)
soc/amd/*/cpu: handle mp_init_with_smm failure
When the mp_init_with_smm call returns a failure, coreboot can't just continue with the initialization and boot process due to the system being in a bad state. Ignoring the failure here would just cause the boot process failing elsewhere where it may not be obvious that the failed multi-processor initialization step was the root cause of that. I'm not 100% sure if calling do_cold_reset or calling die_with_post_code is the better option here. Calling do_cold_reset likely here would likely result in a boot-failure loop, so I call die_with_post_code here. BUG=b:193809448 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/cezanne/cpu.c6
-rw-r--r--src/soc/amd/picasso/cpu.c6
-rw-r--r--src/soc/amd/stoneyridge/cpu.c6
3 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c
index c3d89bf513..440b5ba28b 100644
--- a/src/soc/amd/cezanne/cpu.c
+++ b/src/soc/amd/cezanne/cpu.c
@@ -51,9 +51,9 @@ static const struct mp_ops mp_ops = {
void mp_init_cpus(struct bus *cpu_bus)
{
- /* Clear for take-off */
- /* TODO: Handle mp_init_with_smm failure? */
- mp_init_with_smm(cpu_bus, &mp_ops);
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
+ die_with_post_code(POST_HW_INIT_FAILURE,
+ "mp_init_with_smm failed. Halting.\n");
/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index 9822326afe..b80b0f7a2e 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -55,9 +55,9 @@ static const struct mp_ops mp_ops = {
void mp_init_cpus(struct bus *cpu_bus)
{
- /* Clear for take-off */
- /* TODO: Handle mp_init_with_smm failure? */
- mp_init_with_smm(cpu_bus, &mp_ops);
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
+ die_with_post_code(POST_HW_INIT_FAILURE,
+ "mp_init_with_smm failed. Halting.\n");
/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 06550327d8..6be76bfde8 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -52,9 +52,9 @@ static const struct mp_ops mp_ops = {
void mp_init_cpus(struct bus *cpu_bus)
{
- /* Clear for take-off */
- /* TODO: Handle mp_init_with_smm failure? */
- mp_init_with_smm(cpu_bus, &mp_ops);
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
+ die_with_post_code(POST_HW_INIT_FAILURE,
+ "mp_init_with_smm failed. Halting.\n");
/* The flash is now no longer cacheable. Reset to WP for performance. */
mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);