ACPI: Drop typedef global_nvs_t

Bring all GNVS related initialisation function to global
scope to force identical signatures. Followup work is
likely to remove some as duplicates.

Change-Id: Id4299c41d79c228f3d35bc7cb9bf427ce1e82ba1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42489
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

9 files changed, 23 insertions, 22 deletions

diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index 3ddedcebe8..5e18aad0bb 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <acpi/acpi_gnvs.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
@@ -91,7 +92,7 @@ static void lpc_init(struct device *dev)
 static void lpc_read_resources(struct device *dev)
 {
 	struct resource *res;
-	global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 
 	/* Get the normal pci resources of this device */
 	pci_dev_read_resources(dev);
@@ -127,7 +128,7 @@ static void lpc_read_resources(struct device *dev)
 	compact_resources(dev);
 
 	/* Allocate ACPI NVS in CBMEM */
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
+	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs));
 	printk(BIOS_DEBUG, "ACPI GNVS at %p\n", gnvs);
 }
 
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index 75509eb4c1..3c22f1d123 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -7,6 +7,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
 #include <acpi/acpigen.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
@@ -244,7 +245,7 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
 	return acpi_write_hpet(device, current, rsdp);
 }
 
-static void acpi_create_gnvs(struct global_nvs_t *gnvs)
+void acpi_create_gnvs(struct global_nvs *gnvs)
 {
 	/* Clear out GNVS. */
 	memset(gnvs, 0, sizeof(*gnvs));
@@ -268,7 +269,7 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs)
 
 void southbridge_inject_dsdt(const struct device *device)
 {
-	struct global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
 
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index e5bc3f3ad4..09f60d7280 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -8,8 +8,6 @@
 unsigned long southbridge_write_acpi_tables(const struct device *device,
 		unsigned long current, struct acpi_rsdp *rsdp);
 
-void southbridge_inject_dsdt(const struct device *device);
-
 uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
 				  acpi_rsdp_t *rsdp);
 
diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h
index 83f6afb289..214ab1d0bc 100644
--- a/src/soc/amd/picasso/include/soc/nvs.h
+++ b/src/soc/amd/picasso/include/soc/nvs.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*
- * NOTE: The layout of the global_nvs_t structure below must match the layout
+ * NOTE: The layout of the global_nvs structure below must match the layout
  * in soc/soc/amd/picasso/acpi/globalnvs.asl !!!
  *
  */
@@ -14,7 +14,7 @@
 #include <vendorcode/google/chromeos/gnvs.h>
 #include <soc/southbridge.h>
 
-typedef struct global_nvs_t {
+struct __packed global_nvs {
 	/* Miscellaneous */
 	uint8_t		pcnt; /* 0x00 - Processor Count */
 	uint8_t		ppcm; /* 0x01 - Max PPC State */
@@ -41,7 +41,8 @@ typedef struct global_nvs_t {
 
 	/* ChromeOS specific (0x100 - 0xfff) */
 	chromeos_acpi_t chromeos;
-} __packed global_nvs_t;
-check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
+};
+
+check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
 
 #endif /* __SOC_PICASSO_NVS_H__ */
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c
index 45f66d6b5b..cb22195546 100644
--- a/src/soc/amd/picasso/southbridge.c
+++ b/src/soc/amd/picasso/southbridge.c
@@ -303,7 +303,7 @@ static int get_index_bit(uint32_t value, uint16_t limit)
 static void set_nvs_sws(void *unused)
 {
 	struct soc_power_reg *sws;
-	struct global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 	int index;
 
 	sws = cbmem_find(CBMEM_ID_POWER_STATE);
@@ -337,7 +337,7 @@ void southbridge_init(void *chip_info)
 
 static void set_sb_final_nvs(void)
 {
-	struct global_nvs_t *gnvs = acpi_get_gnvs();
+	struct global_nvs *gnvs = acpi_get_gnvs();
 	if (gnvs == NULL)
 		return;
 
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index 19dee79a96..81a82c736a 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -7,6 +7,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
 #include <acpi/acpigen.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
@@ -219,7 +220,7 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
 	return acpi_write_hpet(device, current, rsdp);
 }
 
-static void acpi_create_gnvs(struct global_nvs_t *gnvs)
+void acpi_create_gnvs(struct global_nvs *gnvs)
 {
 	/* Clear out GNVS. */
 	memset(gnvs, 0, sizeof(*gnvs));
@@ -243,7 +244,7 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs)
 
 void southbridge_inject_dsdt(const struct device *device)
 {
-	struct global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
 
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index c44e934225..9617b45eca 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -14,8 +14,6 @@
 unsigned long southbridge_write_acpi_tables(const struct device *device,
 		unsigned long current, struct acpi_rsdp *rsdp);
 
-void southbridge_inject_dsdt(const struct device *device);
-
 const char *soc_acpi_name(const struct device *dev);
 
 #endif /* __SOC_STONEYRIDGE_ACPI_H__ */
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 2b949c9c3b..864cfffa1a 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*
- * NOTE: The layout of the global_nvs_t structure below must match the layout
+ * NOTE: The layout of the global_nvs structure below must match the layout
  * in soc/soc/amd/stoneyridge/acpi/globalnvs.asl !!!
  *
  */
@@ -14,7 +14,7 @@
 #include <vendorcode/google/chromeos/gnvs.h>
 #include <soc/southbridge.h>
 
-typedef struct global_nvs_t {
+struct __packed global_nvs {
 	/* Miscellaneous */
 	uint8_t		pcnt; /* 0x00 - Processor Count */
 	uint8_t		ppcm; /* 0x01 - Max PPC State */
@@ -46,7 +46,8 @@ typedef struct global_nvs_t {
 
 	/* ChromeOS specific (0x100 - 0xfff) */
 	chromeos_acpi_t chromeos;
-} __packed global_nvs_t;
-check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
+};
+
+check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
 
 #endif /* __SOC_STONEYRIDGE_NVS_H__ */
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index f21734902b..15219b42a2 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -537,7 +537,7 @@ static int get_index_bit(uint32_t value, uint16_t limit)
 static void set_nvs_sws(void *unused)
 {
 	struct soc_power_reg *sws;
-	struct global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 	int index;
 
 	sws = cbmem_find(CBMEM_ID_POWER_STATE);
@@ -576,7 +576,7 @@ static void set_sb_final_nvs(void)
 	size_t fwsize;
 	const struct device *sd, *sata;
 
-	struct global_nvs_t *gnvs = acpi_get_gnvs();
+	struct global_nvs *gnvs = acpi_get_gnvs();
 	if (gnvs == NULL)
 		return;