diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-05-28 17:59:09 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-08 18:24:00 +0000 |
commit | f0c52768f38da98c3abecd294ec4904e48170315 (patch) | |
tree | 6d7edf431e8c0d159a3ced1b8605968ad0b930da /src/soc/amd/stoneyridge | |
parent | a389b3cb4d45d8dec770109f50054fca4c708a28 (diff) |
soc/amd: factor out acpi_soc_get_bert_region to amd/common
This also adds BERT table gerenation support for Cezanne, but since the
functionality to populate the BERT memory region isn't implemented yet,
this won't result in a BERT table being generated on Cezanne, since
bert_generate_ssdt will always return false there.
TEST=BERT ACPI table generation still works on AMD/Mandolin
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I69b4a9a7432041e1f4902436fa4e6dee5332dbd2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55056
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index a16ade5fdc..a2e719b978 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -26,7 +26,6 @@ #include <soc/iomap.h> #include <stdint.h> #include <string.h> -#include <arch/bert_storage.h> #include "chip.h" @@ -326,25 +325,6 @@ static const struct pci_driver family15_northbridge __pci_driver = { .devices = pci_device_ids, }; -enum cb_err acpi_soc_get_bert_region(void **region, size_t *length) -{ - /* - * Skip the table if no errors are present. ACPI driver reports - * a table with a 0-length region: - * BERT: [Firmware Bug]: table invalid. - */ - if (!bert_should_generate_acpi_table()) - return CB_ERR; - - bert_errors_region(region, length); - if (!region) { - printk(BIOS_ERR, "Error: Can't find BERT storage area\n"); - return CB_ERR; - } - - return CB_SUCCESS; -} - /* * Enable VGA cycles. Set memory ranges of the FCH legacy devices (TPM, HPET, * BIOS RAM, Watchdog Timer, IOAPIC and ACPI) as non-posted. Set remaining |