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authorArthur Heymans <arthur@aheymans.xyz>2022-05-23 16:09:51 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-25 12:51:32 +0000
commiteafcc8e5b1122f30e265f77271a18a9124e4dc9e (patch)
tree238fc97b7c805e38b985bb0e59cf086469689940 /src/soc/amd/stoneyridge
parente40ca124c6f28733475cdd3e1e5ebbea7c2b45f5 (diff)
arch/x86/acpi_bert_storage.c: Use a common implementation
All targets now use cbmem for the BERT region, so the implementation can be common. This also drops the obsolete comment about the need to have bert in a reserved region (cbmem gets fixed to be in a reserved region). Change-Id: I6f33d9e05a02492a1c91fb7af94aadaa9acd2931 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/memmap.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c
index e411aa2ef3..f7c6b0075c 100644
--- a/src/soc/amd/stoneyridge/memmap.c
+++ b/src/soc/amd/stoneyridge/memmap.c
@@ -8,23 +8,10 @@
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
#include <cbmem.h>
-#include <arch/bert_storage.h>
#include <soc/northbridge.h>
#include <soc/iomap.h>
#include <amdblocks/biosram.h>
-void bert_reserved_region(void **start, size_t *size)
-{
- if (!CONFIG(ACPI_BERT)) {
- *start = NULL;
- *size = 0;
- } else {
- *start = cbmem_add(CBMEM_ID_ACPI_BERT, CONFIG_ACPI_BERT_SIZE);
- *size = CONFIG_ACPI_BERT_SIZE;
- }
- printk(BIOS_INFO, "Reserved BERT region base: %p, size: 0x%zx\n", *start, *size);
-}
-
void *cbmem_top_chipset(void)
{
msr_t tom = rdmsr(TOP_MEM);