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authorFelix Held <felix-coreboot@felixheld.de>2020-12-01 18:14:01 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-02 21:33:14 +0000
commita5a529599d264da5890fad7b678f7ff9e5e47a80 (patch)
treee983bbc44d284399884d689250054e1c7698fb91 /src/soc/amd/stoneyridge
parentf42da176de685ebc6432da1008c408876060dced (diff)
soc/amd: factor out common SMI/SCI enums and function prototypes
At least a part or the remaining definitions in the soc-specific smi.h files are also common, but those have to be verified more closely. Change-Id: I5a3858e793331a8d2ec262371fa22abac044fd4a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48217 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/gpio.c1
-rw-r--r--src/soc/amd/stoneyridge/include/soc/smi.h43
-rw-r--r--src/soc/amd/stoneyridge/smi_util.c1
-rw-r--r--src/soc/amd/stoneyridge/smihandler.c1
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c1
5 files changed, 4 insertions, 43 deletions
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index a595014813..f1ed202f80 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -3,6 +3,7 @@
#include <stdint.h>
#include <amdblocks/gpio_banks.h>
#include <amdblocks/acpimmio.h>
+#include <amdblocks/smi.h>
#include <soc/gpio.h>
#include <soc/smi.h>
diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h
index 60a91d087a..61624755c5 100644
--- a/src/soc/amd/stoneyridge/include/soc/smi.h
+++ b/src/soc/amd/stoneyridge/include/soc/smi.h
@@ -175,47 +175,4 @@
#define SMI_REG_CONTROL8 0xc0
#define SMI_REG_CONTROL9 0xc4
-enum smi_mode {
- SMI_MODE_DISABLE = 0,
- SMI_MODE_SMI = 1,
- SMI_MODE_NMI = 2,
- SMI_MODE_IRQ13 = 3,
-};
-
-enum smi_sci_type {
- INTERRUPT_NONE,
- INTERRUPT_SCI,
- INTERRUPT_SMI,
- INTERRUPT_BOTH,
-};
-
-enum smi_sci_lvl {
- SMI_SCI_LVL_LOW,
- SMI_SCI_LVL_HIGH,
-};
-
-enum smi_sci_dir {
- SMI_SCI_EDG,
- SMI_SCI_LVL,
-};
-
-struct smi_sources_t {
- int type;
- void (*handler)(void);
-};
-
-struct sci_source {
- uint8_t scimap; /* SCIMAP 0-57 */
- uint8_t gpe; /* 32 GPEs */
- uint8_t direction; /* Active High or Low, smi_sci_lvl */
- uint8_t level; /* Edge or Level, smi_sci_dir */
-};
-
-void configure_smi(uint8_t smi_num, uint8_t mode);
-void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
-void configure_scimap(const struct sci_source *sci);
-void disable_gevent_smi(uint8_t gevent);
-void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes);
-void soc_route_sci(uint8_t event);
-
#endif /* AMD_STONEYRIDGE_SMI_H */
diff --git a/src/soc/amd/stoneyridge/smi_util.c b/src/soc/amd/stoneyridge/smi_util.c
index 2fbc8e2d6a..39b2b95a2c 100644
--- a/src/soc/amd/stoneyridge/smi_util.c
+++ b/src/soc/amd/stoneyridge/smi_util.c
@@ -9,6 +9,7 @@
#include <soc/southbridge.h>
#include <soc/smi.h>
#include <amdblocks/acpimmio.h>
+#include <amdblocks/smi.h>
void configure_smi(uint8_t smi_num, uint8_t mode)
{
diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c
index be55458ac0..c8a113c576 100644
--- a/src/soc/amd/stoneyridge/smihandler.c
+++ b/src/soc/amd/stoneyridge/smihandler.c
@@ -13,6 +13,7 @@
#include <soc/southbridge.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/acpi.h>
+#include <amdblocks/smi.h>
#include <elog.h>
/* bits in smm_io_trap */
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index c59936d7dc..7661607b95 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -18,6 +18,7 @@
#include <amdblocks/lpc.h>
#include <amdblocks/acpi.h>
#include <amdblocks/smbus.h>
+#include <amdblocks/smi.h>
#include <soc/southbridge.h>
#include <soc/smi.h>
#include <soc/amd_pci_int_defs.h>