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authorFelix Held <felix-coreboot@felixheld.de>2020-11-30 18:18:35 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-02 21:27:03 +0000
commit6443ad4a53ab65a2a9c1d29f422644e450c04cd7 (patch)
tree4843082fa04ab74fd08b53aa01eb65165e8edb4f /src/soc/amd/stoneyridge
parent5b3831c75abe5fc50739984eaa70fbada2575bb7 (diff)
soc/amd: factor out common AOAC device enable and status query functions
The code on Stoneyridge didn't set the FCH_AOAC_TARGET_DEVICE_STATE bits to FCH_AOAC_D0_INITIALIZED like the code for Picasso does, but that is the default value after reset for those bits on both platforms. Change-Id: I7cae23257ae54da73b713fe88aca5edfa4656754 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48183 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/Kconfig1
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c22
2 files changed, 1 insertions, 22 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 86df3610e8..f24d202359 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -27,6 +27,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_ACPI
+ select SOC_AMD_COMMON_BLOCK_AOAC
select SOC_AMD_COMMON_BLOCK_LPC
select SOC_AMD_COMMON_BLOCK_PCI
select SOC_AMD_COMMON_BLOCK_HDA
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index b427c18635..f411179c92 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -146,28 +146,6 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association;
}
-static void power_on_aoac_device(unsigned int dev)
-{
- uint8_t byte;
-
- /* Power on the UART and AMBA devices */
- byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
- byte |= FCH_AOAC_PWR_ON_DEV;
- aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
-}
-
-static bool is_aoac_device_enabled(unsigned int dev)
-{
- uint8_t byte;
-
- byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
- byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
- if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
- return true;
- else
- return false;
-}
-
void enable_aoac_devices(void)
{
bool status;