diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-03-19 17:13:48 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-22 09:00:48 +0000 |
| commit | 5479525c74ce301754aee8a0955f258bdb751614 (patch) | |
| tree | 57c337279300cdbb92db231f755122ffe4eb1c3b /src/soc/amd/stoneyridge/southbridge.c | |
| parent | a3ad990089ec0a13df52c7451ee5092229346bf6 (diff) | |
intel/fsp: Update Cannonlake FSP header
Update Cannonlake FSP header to version 7.x.2A.20, the following changes
were made:
1. Add MemtestonWarmBoot option.
2. Add enable8254clockgatingonS3 option.
3. Default disable Tccoffsetlock
BUG=None
TEST=None
Change-Id: Ie794960f0253b2a6dbd55ffda973756d15e35c01
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/25289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
0 files changed, 0 insertions, 0 deletions