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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-22 17:46:16 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-23 18:03:24 +0000 |
| commit | 9a98fc9d1d40f5bd58e587f81cdb38a482a0a91f (patch) | |
| tree | 62dc89df1b73c91b390d4f0256463574bf731198 /src/soc/amd/stoneyridge/memmap.c | |
| parent | f66e781336e992f0791480bd710ef32b71d4ad52 (diff) | |
soc/amd/stoneyridge/fch: change sb prefix of sb_clk_output_48Mhz to fch
Stoneyridge has an integrated FCH and no south bridge, so change the sb
prefix to fch.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5154ae1158f864d4a2aca55e6bcce6a742c6afe1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56527
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/memmap.c')
0 files changed, 0 insertions, 0 deletions