diff options
author | Richard Spiegel <richard.spiegel@silverbackltd.com> | 2018-03-13 10:19:51 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-03-16 15:24:44 +0000 |
commit | 0e0e93cce1a4707f169154d01478ac6faa1be771 (patch) | |
tree | 4e66debd0c468017e92dc27fc5a7330e07c86b0a /src/soc/amd/stoneyridge/include | |
parent | 2cfc862a3e4769ea94c23a109f1ca82dfbc47f1b (diff) |
soc/amd/stoneyridge/southbridge.c: Create AOAC initialization code
Devices that need to have their AOAC register enabled do have a delay before
they become available. Currently each device has their own wait loop. Create
a procedure that initializes all AOAC devices in a table and wait for all
AOAC to become alive, then call this new procedure before the call to
initialize the UART. Then change all procedures that initialize some AOAC by
moving the devices to the table and removing AOAC initialization code.
BUG=b:74416098
TEST=Build and boot kahlee checking that UART is sending debug messages out.
Change-Id: I359791c2a332629aa991f2f17a67e94726a21eb5
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/25142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 434877e15e..6dea0c6864 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -346,6 +346,12 @@ struct soc_amd_stoneyridge_gpio { uint8_t control; }; +struct stoneyridge_aoac { + int enable; + int status; +}; + +void enable_aoac_devices(void); void sb_enable_rom(void); void configure_stoneyridge_uart(void); void configure_stoneyridge_i2c(void); |