summaryrefslogtreecommitdiff
path: root/src/soc/amd/stoneyridge/i2c.c
diff options
context:
space:
mode:
authorTim Van Patten <timvp@google.com>2022-09-13 15:34:08 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-09-15 17:58:31 +0000
commit9eac09720555f22cf5374665e395525c7afa218e (patch)
tree1f3fb593ccb3021888e9a8ad5aeea62b681e3963 /src/soc/amd/stoneyridge/i2c.c
parent54ce4aa98cf55f0715670be4f592a39adcf82328 (diff)
amd/cezanne: Control DPTC with only Kconfig
SOC_AMD_COMMON_BLOCK_ACPI_DPTC can be enabled conditionally for any guybrush boards, similar to .mainboard/google/zork/Kconfig This makes the value dptc_tablet_mode_enable redundant. This CL removes dptc_tablet_mode_enable so DPTC is controlled entirely with the Kconfig value SOC_AMD_COMMON_BLOCK_ACPI_DPTC. This means DPTC is only included for boards that actually enable it. BRANCH=none BUG=b:217911928 TEST=emerge-guybrush coreboot Signed-off-by: Tim Van Patten <timvp@google.com> Change-Id: I07f1266fa80a6c9ee4ec3b3ba970a70c6c72fb54 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/stoneyridge/i2c.c')
0 files changed, 0 insertions, 0 deletions