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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-09-04 13:18:57 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2018-09-07 14:52:32 +0000 |
commit | 64e1fcaaf9d424dd28a8da68292d340701a874b7 (patch) | |
tree | 922648dba0e09991503a833ac906dc3698a9f3c6 /src/soc/amd/stoneyridge/cpu.c | |
parent | e1bd38bec5164de0faf164eb8b28f472ec10b4a8 (diff) |
amd/stoneyridge: Construct BERT region from machine check
Add functions to build a Boot Error Record Table region based on
settings found in the MCA registers.
Two entries are reported for each error due to the nature of the ACPI
driver. The first is a Generic Processor Error, which the OS recognizes
and parses. Generic errors cannot convey much error description or
processor context. Therefore an IA32/X64 Processor Error is also added,
which allows reporting the values found in the MCA MSR registers.
Follow-on work could decode the MC errors more precisely, and better
completing the Generic Error and the Check structure. The current
level of support is sufficient to identify a (i.e., human readable)
problem in dmesg, and provides adequate context information for
analysis.
BUG=b:65446699
TEST=inspect BERT region, and dmesg, on full patch stack. Use test
data plus a failing Grunt system.
Change-Id: I4d4ce29ddefa22aa29e6d3184f1adeaea1d5f837
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/28477
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/cpu.c')
0 files changed, 0 insertions, 0 deletions