diff options
| author | Huayang Duan <huayang.duan@mediatek.com> | 2020-06-08 17:40:55 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-08-06 03:02:17 +0000 |
| commit | cac990f18668a979397d706361d2690fe1d7a220 (patch) | |
| tree | fe54e336ea14170a297d62165b834c8037e29514 /src/soc/amd/stoneyridge/chip.c | |
| parent | 8aca8da2eaf2f58ad7dd956323cbbb0589e7c157 (diff) | |
soc/mediatek/mt8183: Add missing register settings for channels
Some DRAM control settings need to apply to all channels,
so add those missing settings.
Also fix a typo (0x1 < 0) to (0x1 << 0).
BUG=none
BRANCH=kukui
TEST=Boots correctly on Kukui
Change-Id: I35e25c922ed45216d5f04835abcd10809a8d559a
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/chip.c')
0 files changed, 0 insertions, 0 deletions