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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-10 16:13:56 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-11 16:16:29 +0000 |
| commit | aa77d1364f3e1cce0ee9f06b30b1a5ffc6d8321e (patch) | |
| tree | 530ac606f1a98be057a2698e7d22d38ef4755033 /src/soc/amd/stoneyridge/chip.c | |
| parent | 68bcc083bde5135aa0d52b11d62d6ec74947cde5 (diff) | |
soc/amd/cezanne/cpu: add basic zen_2_3_init functionality
The MCA MSRs aren't getting cleared and no microcode update gets applied
for now. Both will be added later.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I38ce5d11787ffefdd0183c5540ae2683158cbee8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50482
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/chip.c')
0 files changed, 0 insertions, 0 deletions