diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-09 12:37:25 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-26 00:17:38 +0000 |
commit | 9e591c409a3e3264f54a3784b0891a7f27dd52d8 (patch) | |
tree | 80f2cbf10a4e5fff5030ee0d4704a6cc019af01c /src/soc/amd/stoneyridge/chip.c | |
parent | f9acd37d7f15290240d4fb9e365a7b79af57b925 (diff) |
soc/amd: Refactor some ACPI S3 calls
Do not pass ACPI S3 state as a parameter, by locally
calling acpi_is_wakeup_s3() compiler has better chance
for optimizing HAVE_ACPI_RESUME=n case.
Test for acpi_s3_allowed() is already included in the
implementation of acpi_is_wakeup_s3() and is removed
as redunandant.
For ramstage, acpi_is_wakeup_s3() evaluates to
romstage_handoff_if_resume().
Change-Id: I6c1e00ec3d5be9a47b9d911c73965bc0c2b17624
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49838
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/chip.c')
-rw-r--r-- | src/soc/amd/stoneyridge/chip.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index e8bc71a4c8..1282f3988c 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -6,7 +6,6 @@ #include <device/device.h> #include <device/pci.h> #include <drivers/i2c/designware/dw_i2c.h> -#include <romstage_handoff.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/northbridge.h> @@ -138,9 +137,7 @@ struct chip_operations soc_amd_stoneyridge_ops = { static void earliest_ramstage(void *unused) { - int s3_resume = acpi_s3_resume_allowed() && - romstage_handoff_is_resume(); - if (!s3_resume) { + if (!acpi_is_wakeup_s3()) { post_code(0x46); if (CONFIG(SOC_AMD_PSP_SELECTABLE_SMU_FW)) psp_load_named_blob(BLOB_SMU_FW2, "smu_fw2"); |