diff options
| author | Chris Ching <chingcodes@google.com> | 2018-02-05 16:46:41 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-02-21 23:36:11 +0000 |
| commit | 2269a3c328c335aa57d7094ca24a9d21ee6ade7d (patch) | |
| tree | ef4539f09885c8786f18f36dfb86a0a2d69cf845 /src/soc/amd/stoneyridge/Makefile.inc | |
| parent | 235daa4bf6b6467b5df675dcfe5041b7f62eeae3 (diff) | |
soc/amd/stoneyridge: Add functions for GPIO interrupts
Add a function to configure interrupt settings for a GPIO. This does
not currently configure GEVENT signals.
The second function returns the GPIO interrupt status and clears the
flag if set.
BUG=b:72838769
BRANCH=none
TEST=Update and test interrupt settings for GPIO_9 on grunt
Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2
Signed-off-by: Chris Ching <chingcodes@chromium.org>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.inc')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index aae30eae3f..61704eaca6 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -40,6 +40,7 @@ subdirs-y += ../../../cpu/x86/smm bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c bootblock-y += BiosCallOuts.c bootblock-y += bootblock/bootblock.c +bootblock-y += gpio.c bootblock-y += i2c.c bootblock-y += monotonic_timer.c bootblock-y += pmutil.c @@ -66,6 +67,7 @@ romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c romstage-y += tsc_freq.c romstage-y += southbridge.c +verstage-y += gpio.c verstage-y += i2c.c verstage-y += monotonic_timer.c verstage-y += sb_util.c |