diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2022-04-10 23:31:24 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-06-06 17:51:31 +0000 |
| commit | b8224f48feb9c2967e22993b630ad1c6a835b241 (patch) | |
| tree | d0e6153962e7b574821ae15280401b41a2d0f026 /src/soc/amd/sabrina/fch.c | |
| parent | 3d79f7f13ee643507d4130d2be357e1505e81f53 (diff) | |
soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
Base code is based of Intel Alder Lake SOC code.
List of changes:
1. Add required Meteor Lake SoC programming till bootblock
2. Include only required headers into include/soc
3. Include MTL-P related DID, BDF
4. Ref: Processor EDS documents
vol1 #621483, vol2 #640858
TEST= Build 'util/abuild/abuild -p none -t google/rex -a -c max'.
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62772
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/amd/sabrina/fch.c')
0 files changed, 0 insertions, 0 deletions