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| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2020-08-19 14:23:19 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-24 09:20:48 +0000 |
| commit | 97b422494365b6d07bd0f9f4ec9e715ea6b7d778 (patch) | |
| tree | da95c2f9be7e6f4871e91f236565104169683061 /src/soc/amd/picasso | |
| parent | 028e527cbd880078bc195fbf62e49732c7523904 (diff) | |
soc/intel/tigerlake: Fix IPU and Vtd config
- FSP enables IPU (Imaging Processing Unit) by default even if its
disabled in devicetree. We need to fill FSP upd based on the device
enablement in devicetree.
- Enable Vtd IPU and IGD settings only if respective IPs are enabled.
BUG=165340186
BRANCH=None
TEST=IPU is disabled and doesn't show in lspci.
Change-Id: Ieff57fb0ebc8522546d6b34da6ca2f2f845bf61d
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44627
Reviewed-by: Daniel H Kang <daniel.h.kang@intel.corp-partner.google.com>
Reviewed-by: John Zhao <john.zhao@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
0 files changed, 0 insertions, 0 deletions