diff options
author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-12-09 10:11:06 -0700 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-12-11 16:59:49 +0000 |
commit | 2f917e6cee275eda6bd620cb3dbf2ebf17173ed9 (patch) | |
tree | 77659b9333296af404a6b7eac9fbee2688b44abf /src/soc/amd/picasso | |
parent | 17689367d5ed24f20145f8a68414d34da039bb79 (diff) |
mb/google/volteer: Clean up romstage and ramstage UPDs
Move the manual calls to fw_config_probe() into the devicetree; the
AUDIO probe is trivial, and the TCSS devices (DMA0, iTBT RP0 & RP1) are
already guarded with probe statements in the baseboard devicetree, so
the code in romstage.c was redundant. The variants seem to have their
USB4 probe statements correct as well, so the manual UPD setting in
mainboard.c was also unnecessary.
BUG=none
TEST=abuild google/volteer
Change-Id: I1d067ff3d181b152c784634ff99202bb2b9202f7
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48512
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso')
0 files changed, 0 insertions, 0 deletions