soc/amd/picasso/romstage: factor out chipset state saving functionality

Since Cezanne needs the exact same code, move it to the common directory
and add a Kconfig option to add this functionality to the build.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I04c4295071a3df7afcb4dfd5435b11fb0bf6963f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

2 files changed, 3 insertions, 23 deletions

diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 765ed600c6..b464539ae6 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -40,6 +40,8 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_LPC
 	select SOC_AMD_COMMON_BLOCK_NONCAR
 	select SOC_AMD_COMMON_BLOCK_PCI
+	select SOC_AMD_COMMON_BLOCK_PM
+	select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
 	select SOC_AMD_COMMON_BLOCK_PSP_GEN2
 	select SOC_AMD_COMMON_BLOCK_SATA
 	select SOC_AMD_COMMON_BLOCK_SMBUS
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 3e75ebef01..7e207687d3 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -1,38 +1,16 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <amdblocks/acpi.h>
 #include <amdblocks/apob_cache.h>
 #include <amdblocks/memmap.h>
+#include <amdblocks/pmlib.h>
 #include <arch/cpu.h>
-#include <cbmem.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
 #include <fsp/api.h>
 #include <program_loading.h>
-#include <soc/acpi.h>
 #include <types.h>
 
-static struct chipset_power_state chipset_state;
-
-static void fill_chipset_state(void)
-{
-	acpi_fill_pm_gpe_state(&chipset_state.gpe_state);
-	gpio_fill_wake_state(&chipset_state.gpio_state);
-}
-
-static void add_chipset_state_cbmem(int unused)
-{
-	struct chipset_power_state *state;
-
-	state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
-
-	if (state)
-		memcpy(state, &chipset_state, sizeof(*state));
-}
-
-ROMSTAGE_CBMEM_INIT_HOOK(add_chipset_state_cbmem);
-
 asmlinkage void car_stage_entry(void)
 {
 	post_code(0x40);