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authorMartin Roth <martinroth@chromium.org>2019-04-22 15:35:17 -0600
committerMartin Roth <martinroth@google.com>2019-07-02 14:11:31 +0000
commit360035ee5b83ab9a1c4f09f30f207edb103ab51c (patch)
treee34ef1e2999bcbd22b6399043dd4f238a38d5e5c /src/soc/amd/picasso/smbus_spd.c
parent5c354b9979c7e7ad9af668bad0e1b6a5c3003d26 (diff)
soc/amd/picasso: Remove ST files not used for PCO
Remove files that aren't needed for the picasso port. Remove traces of AGESA v5 (includes binaryPI support files). Remove SPD helper. Picasso (and all AMD Family 17h processors) have a very different boot flow from previous products. Memory is initialized by the PSP before the x86 processor is released from reset. The SPD is read by the PSP, so it's not needed in coreboot. TEST=None BUG=b:130804851 Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I743ffd6058982f8f182ea4d73172a029967f3ea5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/smbus_spd.c')
-rw-r--r--src/soc/amd/picasso/smbus_spd.c76
1 files changed, 0 insertions, 76 deletions
diff --git a/src/soc/amd/picasso/smbus_spd.c b/src/soc/amd/picasso/smbus_spd.c
deleted file mode 100644
index e57ecde578..0000000000
--- a/src/soc/amd/picasso/smbus_spd.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012, 2017 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <amdblocks/agesawrapper.h>
-#include <console/console.h>
-#include <device/pci_def.h>
-#include <device/device.h>
-#include <soc/southbridge.h>
-#include <soc/smbus.h>
-#include <amdblocks/dimm_spd.h>
-
-/*
- * readspd - Read one or more SPD bytes from a DIMM.
- * Start with offset zero and read sequentially.
- * Optimization relies on autoincrement to avoid
- * sending offset for every byte.
- * Reads 128 bytes in 7-8 ms at 400 KHz.
- */
-static int readspd(uint8_t SmbusSlaveAddress, char *buffer, size_t count)
-{
- uint8_t dev_addr;
- size_t index;
- int error;
- char *pbuf = buffer;
-
- printk(BIOS_SPEW, "-------------READING SPD-----------\n");
- printk(BIOS_SPEW, "SmbusSlave: 0x%08X, count: %zd\n",
- SmbusSlaveAddress, count);
-
- /*
- * Convert received device address to the format accepted by
- * do_smbus_read_byte and do_smbus_recv_byte.
- */
- dev_addr = (SmbusSlaveAddress >> 1);
-
- /* Read the first SPD byte */
- error = do_smbus_read_byte(ACPIMMIO_SMBUS_BASE, dev_addr, 0);
- if (error < 0) {
- printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
- return error;
- }
- *pbuf = (char) error;
- pbuf++;
-
- /* Read the remaining SPD bytes using do_smbus_recv_byte for speed */
- for (index = 1 ; index < count ; index++) {
- error = do_smbus_recv_byte(ACPIMMIO_SMBUS_BASE, dev_addr);
- if (error < 0) {
- printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
- return error;
- }
- *pbuf = (char) error;
- pbuf++;
- }
- printk(BIOS_SPEW, "\n");
- printk(BIOS_SPEW, "-------------FINISHED READING SPD-----------\n");
-
- return 0;
-}
-
-int sb_read_spd(uint8_t spdAddress, char *buf, size_t len)
-{
- return readspd(spdAddress, buf, len);
-}