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authorKangheui Won <khwon@chromium.org>2022-06-28 15:52:43 +1000
committerFelix Held <felix-coreboot@felixheld.de>2022-06-30 13:54:59 +0000
commit9678722060e5884498003f830e054283194799ee (patch)
tree163c46f4392c91122f83f91215dc3e34b3e940ab /src/soc/amd/picasso/sata.c
parent75a49fe856830d97baf882caf35962577d7cba5e (diff)
soc/intel/alderlake: Add BUILDING_WITH_DEBUG_FSP
Intel FSP has "debug" build which is not public, used for debugging by approved developers. Add a Kconfig to indicate that coreboot is building with debug version of FSP so we can adjust few things (i.e. flash layout) in the case. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Ibc561498d7edcb9d7ec155f090822f1eb25d10cd Reviewed-on: https://review.coreboot.org/c/coreboot/+/65466 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
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