diff options
| author | Martin Roth <martin@coreboot.org> | 2020-06-26 08:55:15 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-19 07:15:55 +0000 |
| commit | e21698bcb7369bdbe6f1ee1c7acef80ade0af830 (patch) | |
| tree | 62014f0a5831508db2ad5c442ca13243b3a45b78 /src/soc/amd/picasso/psp_verstage/psp_verstage.h | |
| parent | 143c6d8a74b5c00055ef170c6ac16f9d2a6bbf9e (diff) | |
soc/amd/picasso: Use cbfs to locate the AMD firmware
Switch from locating the AMD firmware in the RW_A &
RW_B regions with their hardcoded locations to using CBFS to find
them. They still need to be at the hardcoded locations so that we
can set the location inside the binary, but instead of just setting
the pointer directly to them, we now search for them with cbfs.
BUG=b:154441227
TEST=Boot & verify that binaries are located in both RW-A & RW-B
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I27b0593e0db7a9e6ba9b0633ac93b4d93954f002
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42831
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/psp_verstage/psp_verstage.h')
| -rw-r--r-- | src/soc/amd/picasso/psp_verstage/psp_verstage.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/psp_verstage/psp_verstage.h b/src/soc/amd/picasso/psp_verstage/psp_verstage.h index e7d6daf65e..ad422fc825 100644 --- a/src/soc/amd/picasso/psp_verstage/psp_verstage.h +++ b/src/soc/amd/picasso/psp_verstage/psp_verstage.h @@ -28,6 +28,8 @@ #define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5 #define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR 0xC6 #define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7 +#define POSTCODE_FMAP_REGION_MISSING 0xC8 +#define POSTCODE_AMD_FW_MISSING 0xC9 #define POSTCODE_UNMAP_SPI_ROM 0xF0 #define POSTCODE_UNMAP_FCH_DEVICES 0xF1 |