From e21698bcb7369bdbe6f1ee1c7acef80ade0af830 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 26 Jun 2020 08:55:15 -0600 Subject: soc/amd/picasso: Use cbfs to locate the AMD firmware Switch from locating the AMD firmware in the RW_A & RW_B regions with their hardcoded locations to using CBFS to find them. They still need to be at the hardcoded locations so that we can set the location inside the binary, but instead of just setting the pointer directly to them, we now search for them with cbfs. BUG=b:154441227 TEST=Boot & verify that binaries are located in both RW-A & RW-B Signed-off-by: Martin Roth Change-Id: I27b0593e0db7a9e6ba9b0633ac93b4d93954f002 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42831 Reviewed-by: Raul Rangel Reviewed-by: Eric Peers Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/psp_verstage/psp_verstage.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/amd/picasso/psp_verstage/psp_verstage.h') diff --git a/src/soc/amd/picasso/psp_verstage/psp_verstage.h b/src/soc/amd/picasso/psp_verstage/psp_verstage.h index e7d6daf65e..ad422fc825 100644 --- a/src/soc/amd/picasso/psp_verstage/psp_verstage.h +++ b/src/soc/amd/picasso/psp_verstage/psp_verstage.h @@ -28,6 +28,8 @@ #define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5 #define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR 0xC6 #define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7 +#define POSTCODE_FMAP_REGION_MISSING 0xC8 +#define POSTCODE_AMD_FW_MISSING 0xC9 #define POSTCODE_UNMAP_SPI_ROM 0xF0 #define POSTCODE_UNMAP_FCH_DEVICES 0xF1 -- cgit v1.2.3