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authorMatt Papageorge <matthewpapa07@gmail.com>2020-06-26 08:47:00 -0500
committerFurquan Shaikh <furquan@google.com>2020-07-24 22:01:51 +0000
commitab83b43b34d729ad260d8f68b725ed025eaafb5e (patch)
tree7c07485cc1d6bb1b264539d1e32e2786c21650a6 /src/soc/amd/picasso/include
parent9857c906854752848cbe0b68fb0c35e924a3dd28 (diff)
soc/amd/picasso/sb: Gate FCH AL2AHB clocks
Gate the A-Link to AHB Bridge clocks to save power. These are internal clocks and are unneeded for Raven/Picasso. This was previously performed within the AGESA FSP but this change relocates it into coreboot. BUG=b:154144239 TEST=Check AL2AHB clock gate bits at the end of POST before and after change with HDT. Change-Id: Ifcbc144a8769f8ea440cdd560bab146bf5058cf9 Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r--src/soc/amd/picasso/include/soc/iomap.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h
index cb845c44d3..6b9ad2a005 100644
--- a/src/soc/amd/picasso/include/soc/iomap.h
+++ b/src/soc/amd/picasso/include/soc/iomap.h
@@ -12,7 +12,12 @@
#endif
#define HPET_BASE_ADDRESS 0xfed00000
+/* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000
+#define AL2AHB_CONTROL_CLK_OFFSET 0x10
+#define AL2AHB_CLK_GATE_EN (1 << 1)
+#define AL2AHB_CONTROL_HCLK_OFFSET 0x30
+#define AL2AHB_HCLK_GATE_EN (1 << 1)
/* Reserved 0xfecd1000-0xfedc3fff */